Invention Grant
- Patent Title: Emphasis signal generating circuit and method for generating emphasis signal
- Patent Title (中): 强调信号发生电路及产生强调信号的方法
-
Application No.: US14539191Application Date: 2014-11-12
-
Publication No.: US09172360B2Publication Date: 2015-10-27
- Inventor: Yukito Tsunoda
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2014-008477 20140121
- Main IPC: H03K5/1252
- IPC: H03K5/1252 ; H03K5/14

Abstract:
An emphasis signal generating circuit includes: a branch and delay unit configured to branch an input signal, delay a branched signal, and output a first delayed signal; a high-frequency extraction unit configured to extract at least one of high-frequency components of the input signal and the first delayed signal to output a high-frequency signal; and an addition and subtraction unit configured to add and subtract the input signal, the first delayed signal, and the high-frequency signal.
Public/Granted literature
- US20150207500A1 EMPHASIS SIGNAL GENERATING CIRCUIT AND METHOD FOR GENERATING EMPHASIS SIGNAL Public/Granted day:2015-07-23
Information query
IPC分类: