Invention Grant
US09172923B1 Sweep dependency based graphics processing unit block scheduling 有权
基于扫描依赖关系的图形处理单元块调度

Sweep dependency based graphics processing unit block scheduling
Abstract:
An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.
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