An electronic device enclosure includes a chassis defining an space, and a cover module. The chassis includes two opposite sidewalls locating at two sides of the space. The cover module includes a cover and a latching apparatus mounted to the cover. A first end of the cover is rotatably connected to first ends of the sidewalls, and the latching apparatus is mounted to a second end of the cover. A second end of one of the sidewalls defines a latching hole. The latching apparatus includes a latching member slidably mounted to the cover, a resilient member sandwiched between the latching member and the cover, and an operation member mounted to the latching member. The latching member includes a latching block. The resilient member biases the latching member to slide, to allow the latching block to latch in the latching hole.