Invention Grant
- Patent Title: Semiconductor device burn-in stress method and system
- Patent Title (中): 半导体器件老化应力法和系统
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Application No.: US14045455Application Date: 2013-10-03
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Publication No.: US09176184B2Publication Date: 2015-11-03
- Inventor: Mark D. Knox , Kirk D. Peterson , Esuasi K. Segbefia
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Hopewell Junction
- Assignee: GLOBALFOUNDRIES U.S. 2 LLC
- Current Assignee: GLOBALFOUNDRIES U.S. 2 LLC
- Current Assignee Address: US NY Hopewell Junction
- Agency: Hoffman Warnick LLC
- Agent Michael LeStrange
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G01R31/28

Abstract:
Burn-in (BI) stress using stress patterns with pin-specific power characteristics. A control device for each conductive pathway from BI board (BIB) contacts to device under test (DUT) connectors/contacts can adjust power delivered to a respective connector/contact responsive to a controller. The control devices can be included in the BIB or an interposer (IP) can be used with existing equipment. Each control device can include a regulator, such as a latchable array of field effect transistors that can regulate power delivered to a respective package connector.
Public/Granted literature
- US20150100939A1 SEMICONDUCTOR DEVICE BURN-IN STRESS METHOD AND SYSTEM Public/Granted day:2015-04-09
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