Invention Grant
- Patent Title: Semiconductor device having hierarchical bit line structure
- Patent Title (中): 具有分层位线结构的半导体器件
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Application No.: US13714015Application Date: 2012-12-13
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Publication No.: US09177619B2Publication Date: 2015-11-03
- Inventor: Kazuhiko Kajigaya
- Applicant: PS4 LUXCO S.A.R.L.
- Applicant Address: LU Luxembourg
- Assignee: PS4 Luxco S.a.r.l.
- Current Assignee: PS4 Luxco S.a.r.l.
- Current Assignee Address: LU Luxembourg
- Priority: JP2011-278558 20111220
- Main IPC: G11C7/02
- IPC: G11C7/02 ; G11C7/06 ; G11C11/4091 ; G11C11/4097

Abstract:
A semiconductor device is disclosed which comprises first and second local bit lines coupled to a plurality of memory cells arranged in first and second areas, respectively, a differential type local sense amplifier amplifying a voltage difference between the first and second local bit lines, a global bit line arranged in an extending direction of the first and second local bit lines, and first and second switches controlling electrical connections between the first and second local bit lines and the global bit line, respectively.
Public/Granted literature
- US20130155798A1 SEMICONDUCTOR DEVICE HAVING HIERARCHICAL BIT LINE STRUCTURE Public/Granted day:2013-06-20
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