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US09177619B2 Semiconductor device having hierarchical bit line structure 有权
具有分层位线结构的半导体器件

Semiconductor device having hierarchical bit line structure
Abstract:
A semiconductor device is disclosed which comprises first and second local bit lines coupled to a plurality of memory cells arranged in first and second areas, respectively, a differential type local sense amplifier amplifying a voltage difference between the first and second local bit lines, a global bit line arranged in an extending direction of the first and second local bit lines, and first and second switches controlling electrical connections between the first and second local bit lines and the global bit line, respectively.
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