Invention Grant
- Patent Title: Fabrication method of semiconductor package having electrical connecting structures
- Patent Title (中): 具有电连接结构的半导体封装的制造方法
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Application No.: US14221667Application Date: 2014-03-21
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Publication No.: US09177837B2Publication Date: 2015-11-03
- Inventor: Pang-Chun Lin , Chun-Yuan Li , Fu-Di Tang , Chien-Ping Huang , Chun-Chi Ke
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW98144920A 20091225
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/56 ; H01L21/78

Abstract:
A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability.
Public/Granted literature
- US20140206146A1 FABRICATION METHOD OF SEMICONDUCTOR PACKAGE HAVING ELECTRICAL CONNECTING STRUCTURES Public/Granted day:2014-07-24
Information query
IPC分类: