Invention Grant
US09177863B2 Multi-chip package with offset die stacking and method of making same
有权
具有偏移芯片堆叠的多芯片封装及其制造方法
- Patent Title: Multi-chip package with offset die stacking and method of making same
- Patent Title (中): 具有偏移芯片堆叠的多芯片封装及其制造方法
-
Application No.: US13951132Application Date: 2013-07-25
-
Publication No.: US09177863B2Publication Date: 2015-11-03
- Inventor: Peter Gillingham
- Applicant: Conversant Intellectual Property Management Inc.
- Applicant Address: CA Ottawa
- Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee: Conversant Intellectual Property Management Inc.
- Current Assignee Address: CA Ottawa
- Agent Daniel Hammond
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/82 ; H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L23/498 ; H01L23/31
Abstract:
A semiconductor device has a plurality of stacked semiconductor dice mounted on a substrate. Each die has similar dimensions. Each die has a first plurality of bonding pads arranged along a bonding edge of the die. A first group of the dice are mounted to the substrate with the bonding edge oriented in a first direction. A second group of the dice are mounted to the substrate with the bonding edge oriented in a second direction opposite the first direction. Each die is laterally offset in the second direction relative to the remaining dice by a respective lateral offset distance such that the bonding pads of each die are not disposed between the substrate and any portion of the remaining dice in a direction perpendicular to the substrate. A plurality of bonding wires connects the bonding pads to the substrate. A method of manufacturing a semiconductor device is also disclosed.
Public/Granted literature
- US20130309810A1 MULTI-CHIP PACKAGE WITH OFFSET DIE STACKING AND METHOD OF MAKING SAME Public/Granted day:2013-11-21
Information query
IPC分类:
