Invention Grant
- Patent Title: Power semiconductor device and method therefor
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Application No.: US14685785Application Date: 2015-04-14
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Publication No.: US09177866B2Publication Date: 2015-11-03
- Inventor: Robert Bruce Davies
- Applicant: Estivation Properties LLC
- Applicant Address: US DE Dover
- Assignee: ESTIVATION PROPERTIES LLC
- Current Assignee: ESTIVATION PROPERTIES LLC
- Current Assignee Address: US DE Dover
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234 ; H01L21/762 ; H01L21/768 ; H01L21/3205 ; H01L29/66

Abstract:
A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a second electrode interconnection region overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform is used as an edge termination of an epitaxial layer to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.
Public/Granted literature
- US20150221558A1 POWER SEMICONDUCTOR DEVICE AND METHOD THEREFOR Public/Granted day:2015-08-06
Information query
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