Invention Grant
US09177956B2 Field effect transistor (FET) with self-aligned contacts, integrated circuit (IC) chip and method of manufacture
有权
具有自对准触点的场效应晶体管（FET），集成电路（IC）芯片和制造方法
- Patent Title: Field effect transistor (FET) with self-aligned contacts, integrated circuit (IC) chip and method of manufacture
- Patent Title (中): 具有自对准触点的场效应晶体管（FET），集成电路（IC）芯片和制造方法
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Application No.: US13956339Application Date: 2013-07-31
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Publication No.: US09177956B2Publication Date: 2015-11-03
- Inventor: Szu-Lin Cheng , Jack O. Chu , Isaac Lauer , Jeng-Bang Yau
- Applicant: International Business Machines Corporation
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Law Office of Charles W. Peterson, Jr.
- Agent Louis J. Percello, Esq.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/092 ; H01L21/8238 ; H01L27/12 ; H01L21/84
Abstract:
Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs and IC. FET locations and adjacent source/drain regions are defined on a semiconductor wafer, e.g., a silicon on insulator (SOI) wafer. Source/drains are formed in source/drains regions. A stopping layer is formed on source/drains. Contact spacers are formed above gates. Source/drain contacts are formed to the stopping layer, e.g., after converting the stopping layer to silicide. The contact spacers separate source/drain contacts from each other.
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