Invention Grant
US09178015B2 Trench MOS device having a termination structure with multiple field-relaxation trenches for high voltage applications
有权
具有用于高电压应用的具有多个场弛豫槽的终端结构的沟槽MOS器件
- Patent Title: Trench MOS device having a termination structure with multiple field-relaxation trenches for high voltage applications
- Patent Title (中): 具有用于高电压应用的具有多个场弛豫槽的终端结构的沟槽MOS器件
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Application No.: US14152564Application Date: 2014-01-10
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Publication No.: US09178015B2Publication Date: 2015-11-03
- Inventor: Yi-Yu Lin , Chun-Chueh Chang , Pu Ju Kung
- Applicant: Vishay General Semiconductor LLC
- Applicant Address: US NY Hauppauge
- Assignee: Vishay General Semiconductor LLC
- Current Assignee: Vishay General Semiconductor LLC
- Current Assignee Address: US NY Hauppauge
- Agency: Mayer & Williams PC
- Agent Stuart H. Mayer
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/06 ; H01L29/872 ; H01L29/40

Abstract:
A termination structure for a semiconductor device includes a semiconductor substrate having an active region and a termination region. Two or more trench cells are located in the termination region and extend from a boundary of the active region toward an edge of the semiconductor substrate. A termination trench is formed in the termination region on a side of the trench cells remote from the active region. A conductive spacer is located adjacent to a sidewall of the termination trench nearest the trench cells. A first oxide layer is formed in the termination trench and contacts a sidewall of the conductive spacer. A first conductive layer is formed on a backside surface of the semiconductor substrate. A second conductive layer is formed atop the active region and the termination region.
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