Invention Grant
- Patent Title: Fabrication method of semiconductor device and fabrication method of dynamic threshold transistor
- Patent Title (中): 半导体器件的制造方法和动态阈值晶体管的制造方法
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Application No.: US14206085Application Date: 2014-03-12
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Publication No.: US09178034B2Publication Date: 2015-11-03
- Inventor: Masahiro Fukuda , Eiji Yoshida , Yosuke Shimamune
- Applicant: FUJITSU SEMICONDUCTOR LIMITED
- Applicant Address: JP Yokohama
- Assignee: FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee: FUJITSU SEMICONDUCTOR LIMITED
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L29/06 ; H01L29/78 ; H01L29/66 ; H01L21/8238 ; H01L27/12

Abstract:
A method includes: etching a silicon substrate except for a silicon substrate portion on which a channel region is to be formed to form first and second trenches respectively at a first side and a second side of the silicon substrate portion; filling the first and second trenches by epitaxially growing a semiconductor layer having etching selectivity against silicon and further a silicon layer; removing the semiconductor layer selectivity by a selective etching process to form voids underneath the silicon layer respectively at the first side and the second side of the substrate portion; burying the voids at least partially with a buried insulation film; forming a gate insulation film and a gate electrode on the silicon substrate portion; and forming a source region in the silicon layer at the first side of the silicon substrate portion and a drain region at the second side of the silicon substrate portion.
Public/Granted literature
- US20140193960A1 FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF DYNAMIC THRESHOLD TRANSISTOR Public/Granted day:2014-07-10
Information query
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