Invention Grant
US09184146B2 Semiconductor package and wiring board having the semiconductor package thereon
有权
其上具有半导体封装的半导体封装和布线板
- Patent Title: Semiconductor package and wiring board having the semiconductor package thereon
- Patent Title (中): 其上具有半导体封装的半导体封装和布线板
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Application No.: US14521609Application Date: 2014-10-23
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Publication No.: US09184146B2Publication Date: 2015-11-10
- Inventor: Toshihisa Yamamoto
- Applicant: DENSO CORPORATION
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Nixon & Vanderhye P.C.
- Priority: JP2013-224076 20131029
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01L23/00 ; H01L23/04 ; H05K1/18 ; H01L23/498 ; H01L25/065

Abstract:
A semiconductor package includes a chip, a sealing body covering the chip, and a plurality of external connection terminals connected to the chip. The external connection terminals expose from a surface of the sealing body and are arranged in a grid on the surface of the sealing body. In the grid on the surface of the sealing body, each external connection terminal is adjacent to an area vacant of an other external connection terminal in at least one direction of eight directions from each external connection terminal, the eight directions including first linear directions along a row of the grid, second linear directions along a row of the grid perpendicular to the first linear directions, and four diagonal directions defined between the first linear directions and the second linear directions.
Public/Granted literature
- US20150115430A1 SEMICONDUCTOR PACKAGE AND WIRING BOARD HAVING THE SEMICONDUCTOR PACKAGE THEREON Public/Granted day:2015-04-30
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