One-transistor (1T) volatile memory devices and manufacturing methods thereof are provided. The device includes a substrate having top and bottom surfaces and an isolation buffer layer disposed below the top substrate surface. The isolation buffer layer is an amorphized portion of the substrate. An area of the substrate between the isolation buffer layer and the top substrate surface serves as a body region of a transistor. The device also includes a transistor disposed over the substrate. The transistor includes a gate disposed on the top substrate surface, and first and second diffusion regions disposed in the body region adjacent to first and second sides of the gate.