Invention Grant
US09184233B2 Structure and method for defect passivation to reduce junction leakage for finFET device
有权
用于缺陷钝化的结构和方法，以减少finFET器件的结漏电
- Patent Title: Structure and method for defect passivation to reduce junction leakage for finFET device
- Patent Title (中): 用于缺陷钝化的结构和方法，以减少finFET器件的结漏电
-
Application No.: US13779286Application Date: 2013-02-27
-
Publication No.: US09184233B2Publication Date: 2015-11-10
- Inventor: Mark van Dal
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/06 ; H01L21/265 ; H01L21/8234 ; H01L27/088 ; H01L21/762
Abstract:
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate of a first semiconductor material; shallow trench isolation (STI) features formed in the semiconductor substrate; and a fin-like active region of a second semiconductor material epitaxy grown on the semiconductor substrate. The first semiconductor material has a first lattice constant and the second semiconductor material has a second lattice constant different from the first lattice constant. The fin-like active region further includes fluorine species.
Public/Granted literature
- US20140239347A1 Structure and Method for Defect Passivation To Reduce Junction Leakage For FinFET Device Public/Granted day:2014-08-28
Information query
IPC分类:
