Invention Grant
- Patent Title: SiGe based gate driven PMOS trigger circuit
- Patent Title (中): 基于SiGe的栅极驱动PMOS触发电路
-
Application No.: US13533059Application Date: 2012-06-26
-
Publication No.: US09184586B2Publication Date: 2015-11-10
- Inventor: Wen-Han Wang , Kuo-Ji Chen
- Applicant: Wen-Han Wang , Kuo-Ji Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H02H9/04
- IPC: H02H9/04

Abstract:
Some embodiments of the present disclosure relate to a low-power, area efficient ESD protection device that provides ESD protection to an ESD susceptible circuit. The ESD protection device has a trigger circuit with a resistor. The resistor has a first terminal connected to the first external pin and a second terminal connected directly to a gate of a SiGe based PMOS shunt transistor. The trigger circuit generates a trigger signal that drives the gate of the PMOS device to shunt power away from the ESD susceptible circuit when an ESD event is present. The SiGe based PMOS shunt transistor has a lower gate leakage than a conventional NMOS shunt transistors, thereby providing for an ESD circuit with a low leakage current at small gate lengths.
Public/Granted literature
- US20130342941A1 SIGE BASED GATE DRIVEN PMOS TRIGGER CIRCUIT Public/Granted day:2013-12-26
Information query