Invention Grant
US09190156B2 NAND flash memory employing bit line charge/discharge circuit 有权
NAND闪存采用位线充电/放电电路

NAND flash memory employing bit line charge/discharge circuit
Abstract:
According to one embodiment, a nonvolatile semiconductor storage device includes a memory cell array where memory cells are arranged in a row direction and a column direction in a matrix shape; word lines which select the memory cell in the row direction; bit lines which select the memory cells in the column direction; a sense amplifier circuit which determines values stored in the memory cells based on states of the bit line; and a charge/discharge circuit which is formed in a well where the memory cell array is arranged and which charges or discharges the bit lines.
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