Invention Grant
US09190499B2 Nonvolatile semiconductor memory device, capacitance element, and method for manufacturing nonvolatile semiconductor memory device
有权
非易失性半导体存储器件,电容元件和用于制造非易失性半导体存储器件的方法
- Patent Title: Nonvolatile semiconductor memory device, capacitance element, and method for manufacturing nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件,电容元件和用于制造非易失性半导体存储器件的方法
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Application No.: US13971274Application Date: 2013-08-20
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Publication No.: US09190499B2Publication Date: 2015-11-17
- Inventor: Takahiro Hirai , Masaru Kito
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2013-063003 20130325
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L29/66 ; G11C11/24 ; H01L27/115 ; H01L49/02

Abstract:
According to one embodiment, a nonvolatile semiconductor memory device includes a memory element region and a capacitance element region. The capacitance region including: a second stacked body, each of a plurality of second electrode layers and each of a plurality of second insulating layers being stacked alternately; a plurality of conductive layers; and a second insulating film provided between each of the plurality of conductive layers and each of the plurality of second electrode layers. In the capacitance element region, a first capacitor is made of one of the plurality of second insulating layers and a pair of the second electrode layers sandwiching the one of the plurality of second insulating layers, and a second capacitor is made of the second insulating film, and one of the plurality of second electrode layers and one of the plurality of conductive layers sandwiching the second insulating film.
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Information query
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