Invention Grant
US09190526B2 Thin film transistor, display panel, and method for fabricating thin film transistor
有权
薄膜晶体管，显示面板和制造薄膜晶体管的方法
- Patent Title: Thin film transistor, display panel, and method for fabricating thin film transistor
- Patent Title (中): 薄膜晶体管，显示面板和制造薄膜晶体管的方法
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Application No.: US14111887Application Date: 2012-04-12
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Publication No.: US09190526B2Publication Date: 2015-11-17
- Inventor: Masao Moriguchi , Yohsuke Kanzaki , Yudai Takanishi , Takatsugu Kusumi
- Applicant: Masao Moriguchi , Yohsuke Kanzaki , Yudai Takanishi , Takatsugu Kusumi
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Keating & Bennett, LLP
- Priority: JP2011-092418 20110418
- International Application: PCT/JP2012/002533 WO 20120412
- International Announcement: WO2012/144165 WO 20121026
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/12 ; H01L21/00 ; H01L51/40 ; H01L29/786 ; G02F1/1368 ; H01L29/66 ; H01L27/12
Abstract:
A thin film transistor includes a gate electrode (11a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (13a) made of an oxide semiconductor and provided on the gate insulating film (12a), a source electrode (16aa) and a drain electrode (16ab) provided on the semiconductor layer (13a) via easily reducible metal layers (15aa, 15ab) and spaced apart from each other, with a channel region (C) interposed therebetween, a conductive region (E) provided in the semiconductor layer (13a), and a diffusion reducing portion (13ca, 13cb) provided in the semiconductor layer (13a), for reducing diffusion of the conductive region (E) into the channel region (C).
Public/Granted literature
- US20140034947A1 THIN FILM TRANSISTOR, DISPLAY PANEL, AND METHOD FOR FABRICATING THIN FILM TRANSISTOR Public/Granted day:2014-02-06
Information query
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