Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US14471278Application Date: 2014-08-28
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Publication No.: US09196570B2Publication Date: 2015-11-24
- Inventor: Kiyotada Funane
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2012-037968 20120223
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L27/11 ; G11C5/06 ; G11C5/14 ; G11C11/417 ; H01L27/02 ; H01L23/528

Abstract:
To reinforce power supply wirings without sacrificing the interconnectivity of semiconductor devices. When three wirings are formed in parallel in the same wiring layer and the center wiring among them is shorter than the outer wirings, a projecting portion integrated into the outer wiring is formed utilizing a free space remaining on the extension of the center wiring. For example, when the outer wirings are used as power supply wirings, the power supply wirings can be reinforced by adding the projecting portion. At this time, because the projecting portion is arranged in the free space, the interconnectivity is not sacrificed.
Public/Granted literature
- US20150008590A1 SEMICONDUCTOR DEVICE Public/Granted day:2015-01-08
Information query
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