Invention Grant
- Patent Title: Semiconductor packaging arrangement
- Patent Title (中): 半导体封装布置
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Application No.: US14151110Application Date: 2014-01-09
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Publication No.: US09196577B2Publication Date: 2015-11-24
- Inventor: Ralf Otremba , Josef Höglauer , Jürgen Schredl , Xaver Schlögel , Klaus Schiess
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/495

Abstract:
A semiconductor packaging arrangement includes a transistor device including a first side including a source electrode and a gate electrode, a die pad having a first surface, and a lead having a first surface. A first conductive member is arranged between the source electrode and the first surface of the die pad and spaces the source electrode from the first surface of the die pad by a distance that is greater than a distance between the gate electrode and the first surface of the lead.
Public/Granted literature
- US20150194373A1 Semiconductor Packaging Arrangement Public/Granted day:2015-07-09
Information query
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