Invention Grant
- Patent Title: Semiconductor memory device and method of controlling data thereof
- Patent Title (中): 半导体存储器件及其数据的控制方法
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Application No.: US14023611Application Date: 2013-09-11
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Publication No.: US09202564B2Publication Date: 2015-12-01
- Inventor: Yoichi Minemura , Takayuki Tsukamoto , Hiroshi Kanno , Takamasa Okawa
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C13/00
Abstract:
A control circuit is configured to perform a state determination operation to sense voltages of a plurality of first wiring lines, the voltages changing based on current flowing from the first wiring lines to a plurality of second wiring lines via a plurality of variable resistive elements. Then, the control circuit is configured to adjust voltages to be applied to the first and second wiring lines in a reset operation or a set operation based on the voltages of the first wiring lines sensed in the state determination operation.
Public/Granted literature
- US20140219005A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING DATA THEREOF Public/Granted day:2014-08-07
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