Invention Grant
US09202711B2 Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
有权
用于减少光点缺陷和表面粗糙度的绝缘体半导体晶片制造方法
- Patent Title: Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
- Patent Title (中): 用于减少光点缺陷和表面粗糙度的绝缘体半导体晶片制造方法
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Application No.: US14209083Application Date: 2014-03-13
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Publication No.: US09202711B2Publication Date: 2015-12-01
- Inventor: Qingmin Liu , Jeffrey L. Libbert
- Applicant: SunEdison Inc.
- Applicant Address: SG Singapore
- Assignee: SunEdison Semiconductor Limited (UEN201334164H)
- Current Assignee: SunEdison Semiconductor Limited (UEN201334164H)
- Current Assignee Address: SG Singapore
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/324
- IPC: H01L21/324 ; H01L21/762 ; H01L21/322 ; H01L21/302 ; H01L21/3065
Abstract:
A method for reducing light point defects of a semiconductor-on-insulator structure and a method for reducing the surface roughness of a semiconductor-on-insulator structure are disclosed. The methods can include a combination of thermally annealing the structure followed by a non-contact smoothing process.
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