Invention Grant
- Patent Title: Multi-layer semiconductor device structure
- Patent Title (中): 多层半导体器件结构
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Application No.: US14044088Application Date: 2013-10-02
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Publication No.: US09202788B2Publication Date: 2015-12-01
- Inventor: Yasutoshi Okuno , Yi-Tang Lin
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/8234 ; H01L27/12 ; H01L27/06 ; G03F7/20 ; G03F9/00

Abstract:
A semiconductor device structure and a method of fabricating a semiconductor device structure are provided. A first device layer is formed over a substrate, where an alignment structure is patterned in the first device layer. A dielectric layer is provided over the first device layer. The dielectric layer is patterned to include an opening over the alignment structure. A second device layer is formed over the dielectric layer. The second device layer is patterned using a mask layer, where the mask layer includes a structure that is aligned relative to the alignment structure. The alignment structure is visible via the opening during the patterning of the second device layer.
Public/Granted literature
- US20150091090A1 MULTI-LAYER SEMICONDUCTOR DEVICE STRUCTURE Public/Granted day:2015-04-02
Information query
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