A current sensor includes input modules each including an amplifier having a first input coupled to a respective winding of a regulator; a transistor having a control input coupled to the amplifier output, a first terminal coupled to a second input of the operational amplifier, and a second terminal configured to provide a sense current representing an unbalance of a phase current with respect to an average current of a winding; a current generator configured to bias the transistor; and an output resistor coupling the first terminal to an intermediate node. An output stage includes an output amplifier having a first input coupled to the intermediate node, and an output transistor having a control terminal coupled to the output amplifier output, a first terminal coupled to a second input of the output amplifier, and a second terminal providing another sense current representing a total current of the regulator.