Invention Grant
- Patent Title: Fanout line structure of array substrate and display panel
- Patent Title (中): 阵列基板和显示面板的扇出线结构
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Application No.: US14113582Application Date: 2013-07-31
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Publication No.: US09204532B2Publication Date: 2015-12-01
- Inventor: Peng Du , Ming hung Shih , Jiali Jiang
- Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD
- Priority: CN201310281983 20130705
- International Application: PCT/CN2013/080452 WO 20130731
- International Announcement: WO2015/000202 WO 20150108
- Main IPC: G02F1/1345
- IPC: G02F1/1345 ; H05K1/02 ; H05K1/16

Abstract:
A fanout line structure of an array substrate includes first fanout lines arranged on a fanout area of the array substrate, and second fanout lines arranged on the fanout area of the array substrate. A second conducting film is arranged at a bottom of the second fanout line, a second capacitor is formed between the second conducting film and a first conducting film of the second fanout line, the second capacitor is used to reduce an impedance difference between the fanout lines. Capacitance value of the second capacitor is dependent on an overlapping area between the second conducting film and the first conducting film.
Public/Granted literature
- US20150009438A1 FANOUT LINE STRUCTURE OF ARRAY SUBSTRATE AND DISPLAY PANEL Public/Granted day:2015-01-08
Information query
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