Invention Grant
US09208855B2 Weak bit compensation for static random access memory 有权
静态随机存取存储器的弱位补偿

Weak bit compensation for static random access memory
Abstract:
A static random access memory (SRAM) is provided. The SRAM includes a data line, a data line bar, and a current path block. The current path block includes at least two transistors configured to provide a current path for the data line in transition from a first logic voltage to a second logic voltage, wherein the current path block is connected to the data line and the data line bar during an entire duration of operation of the SRAM.
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