Invention Grant
- Patent Title: Global dielectric and barrier layer
- Patent Title (中): 全球电介质和阻挡层
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Application No.: US14063175Application Date: 2013-10-25
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Publication No.: US09209072B2Publication Date: 2015-12-08
- Inventor: Ya-Lien Lee
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/4763 ; H01L29/40 ; H01L29/43 ; H01L21/768

Abstract:
Methods of fabricating a semiconductor device are described. The method includes forming a patterned oxide layer having a plurality of openings over a substrate, depositing a metal layer in the openings to form metal plugs, depositing a global transformable (GT) layer on the oxide layer and the metal plugs, and depositing a capping layer directly on the GT layer without exposing the GT layer to ambient air. The GT layer on the oxide layer transforms into a dielectric oxide and the GT layer on the metal plugs remains conductive during deposition of the capping layer.
Public/Granted literature
- US20150118842A1 Global Dielectric And Barrier Layer Public/Granted day:2015-04-30
Information query
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