Invention Grant
US09209112B2 Semiconductor device having stacked substrates with protruding and recessed electrode connection
有权
具有堆叠的具有突出和凹陷电极连接的衬底的半导体器件
- Patent Title: Semiconductor device having stacked substrates with protruding and recessed electrode connection
- Patent Title (中): 具有堆叠的具有突出和凹陷电极连接的衬底的半导体器件
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Application No.: US14504957Application Date: 2014-10-02
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Publication No.: US09209112B2Publication Date: 2015-12-08
- Inventor: Hideo Imai
- Applicant: Seiko Epson Corporation
- Applicant Address: JP
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: JP2011-037969 20110224
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/00 ; H01L25/07 ; H01L21/768 ; H01L25/065
Abstract:
A first substrate with a penetration electrode formed thereon is stacked on a second substrate with a protruding electrode formed thereon. The penetration electrode has a recessed portion. The substrates are stacked with the protruding electrode entered in the recessed portion. A distal width of the protruding electrode is smaller than an opening width of the recessed portion.
Public/Granted literature
- US20150054138A1 SEMICONDUCTOR DEVICE HAVING STACKED SUBSTRATES WITH PROTRUDING AND RECESSED ELECTRODE CONNECTION Public/Granted day:2015-02-26
Information query
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