Invention Grant
- Patent Title: Integrated circuit shielding technique utilizing stacked die technology incorporating top and bottom nickel-iron alloy shields having a low coefficient of thermal expansion
- Patent Title (中): 集成电路屏蔽技术利用堆叠模具技术,结合具有低热膨胀系数的顶部和底部镍 - 铁合金屏蔽
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Application No.: US14101072Application Date: 2013-12-09
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Publication No.: US09209138B2Publication Date: 2015-12-08
- Inventor: Scott Popelar , Matthew Von Thun , Richard Jadomski , Karen Jackson
- Applicant: Aeroflex Colorado Springs, Inc.
- Applicant Address: US CO Colorado Springs
- Assignee: Aeroflex Colorado Springs, Inc.
- Current Assignee: Aeroflex Colorado Springs, Inc.
- Current Assignee Address: US CO Colorado Springs
- Agency: Hogan Lovells US LLP
- Agent Peter J. Meza
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L27/22 ; H01L23/10 ; H01L43/02

Abstract:
An integrated circuit shielding technique utilizing stacked die technology incorporating top and bottom nickel-iron alloy shields having a low coefficient of thermal expansion of especial utility in conjunction with magnetoresistive random access memory (MRAM) and other devices requiring magnetic shielding.
Public/Granted literature
Information query
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