Invention Grant
- Patent Title: Bump-on-trace structures with high assembly yield
- Patent Title (中): 具有高组装产量的凸块式跟踪结构
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Application No.: US14080217Application Date: 2013-11-14
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Publication No.: US09209149B2Publication Date: 2015-12-08
- Inventor: Chih-Fan Huang , Yi-Teh Chou , Ming-Da Cheng , Tin-Hao Kuo , Chung-Shi Liu , Chen-Shien Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/60 ; H01L23/31

Abstract:
A package includes first package component, which further includes a first metal trace at a surface of the first package component, with the first metal trace having a trace width measured in a direction perpendicular to a lengthwise direction of the first metal trace. The first package component further includes a second metal trace at the surface of the first package component. The first metal trace and the second metal trace are parallel to each other. A second package component is overlying the first package component, wherein the second package component includes a metal bump. A solder region bonds the metal bump to the first metal trace, wherein the solder region contacts a top surface and sidewalls of the first portion of the first metal trace. A ratio of a volume of the solder region to the trace width is between about 1,100 μm2 and about 1,300 μm2.
Public/Granted literature
- US20150130051A1 Bump-on-Trace Structures with High Assembly Yield Public/Granted day:2015-05-14
Information query
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