Invention Grant
US09209195B2 SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array
有权
SRAM与位单元阵列中具有不间断磨碎的第一多晶和第一接触图案
- Patent Title: SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array
- Patent Title (中): SRAM与位单元阵列中具有不间断磨碎的第一多晶和第一接触图案
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Application No.: US13874806Application Date: 2013-05-01
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Publication No.: US09209195B2Publication Date: 2015-12-08
- Inventor: Anand Seshadri , Steve Prins , Russell McMullan
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Cimino
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L27/11 ; H01L27/02
Abstract:
An integrated circuit containing an SRAM may be formed using one or more periodic photolithographic patterns for elements of the integrated circuit such as gates and contacts, which have alternating line and space configurations in SRAM cells. Strap rows of the SRAM containing well ties and/or substrate taps which have SRAM cells on two opposite sides are configured so that the alternating line and space configurations are continuous across the regions containing the well ties and substrate taps.
Public/Granted literature
- US20140327082A1 SRAM WELL-TIE WITH AN UNINTERRUPTED GRATED FIRST POLY AND FIRST CONTACT PATTERNS IN A BIT CELL ARRAY Public/Granted day:2014-11-06
Information query
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