Invention Grant
- Patent Title: High frequency switch circuit including gate bias resistances
- Patent Title (中): 高频开关电路包括栅极偏置电阻
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Application No.: US14062645Application Date: 2013-10-24
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Publication No.: US09209801B2Publication Date: 2015-12-08
- Inventor: Noriaki Matsuno
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2012-242174 20121101
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H03K17/693

Abstract:
N (n is an integer more than one) number of transistors are connected in series in an order from a first transistor to an nth transistor from a first terminal to a second terminal. First to nth nodes are connected to gates of the first to nth transistors. N number of resistance elements are connected in series in an order from a first resistance element to an nth resistance element from a bias terminal to the nth node. The first resistance element is connected between said bias terminal and said first node, and the kth resistance element (k=2 to n) is connected between the (k−1)th node and the kth node. Thus, a high frequency switch circuit can reduce an area of the whole gate bias resistances.
Public/Granted literature
- US20140118053A1 HIGH FREQUENCY SWITCH CIRCUIT Public/Granted day:2014-05-01
Information query
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