Methods of fabricating wafer-level flip chip device packages

Invention Grant

US09214615B2 Methods of fabricating wafer-level flip chip device packages 有权

Title translation: 制造晶圆级倒装芯片器件封装的方法

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Patent Title: Methods of fabricating wafer-level flip chip device packages
Patent Title (中): 制造晶圆级倒装芯片器件封装的方法
Application No.: US14505894

Application Date: 2014-10-03
Publication No.: US09214615B2

Publication Date: 2015-12-15
Inventor: Michael A. Tischler
Applicant: Michael A. Tischler
Applicant Address: CA Richmond
Assignee: Cooledge Lighting Inc.
Current Assignee: Cooledge Lighting Inc.
Current Assignee Address: CA Richmond
Agency: Morgan, Lewis & Bockius LLP
Main IPC: H01L21/00
IPC: H01L21/00 ; H01L33/62 ; H01L21/78 ; H01L33/50 ; H01L23/00 ; H01L23/544 ; H01L21/683 ; H01L33/00

Methods of fabricating wafer-level flip chip device packages

Abstract:

In accordance with certain embodiments, semiconductor dies are at least partially coated with a conductive adhesive prior to singulation and subsequently bonded to a substrate having electrical traces thereon.

Abstract(Chinese):

根据某些实施例，半导体管芯在分离之前至少部分地被导电粘合剂涂覆，并随后结合到其上具有电迹线的基板上。

Public/Granted literature

US20150076551A1 METHODS OF FABRICATING WAFER-LEVEL FLIP CHIP DEVICE PACKAGES Public/Granted day:2015-03-19

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备