Invention Grant
US09217774B2 Cycle-accurate replay and debugging of running FPGA systems 有权
运行FPGA系统的循环准确重放和调试

Cycle-accurate replay and debugging of running FPGA systems
Abstract:
As described herein, a tool records a log (or trace) of all sources of non-determinism in the system. In most of the cases, it's enough to log all transitions and the exact timestamps at all the entry and exit points of the system. By using this information it is possible to recreate a cycle accurate execution of the hardware system in simulation. Unlike CHIPSCOPE and SIGNALTAP which let you monitor a small number of signals in the design, the tool provides visibility into the whole system.
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