Invention Grant
- Patent Title: Cycle-accurate replay and debugging of running FPGA systems
- Patent Title (中): 运行FPGA系统的循环准确重放和调试
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Application No.: US14473058Application Date: 2014-08-29
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Publication No.: US09217774B2Publication Date: 2015-12-22
- Inventor: Daniel Foisy , Sunil K. Shukla
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Gail H. Zarick, Esq.
- Main IPC: G06F11/22
- IPC: G06F11/22 ; G06F17/50 ; G01R31/3185

Abstract:
As described herein, a tool records a log (or trace) of all sources of non-determinism in the system. In most of the cases, it's enough to log all transitions and the exact timestamps at all the entry and exit points of the system. By using this information it is possible to recreate a cycle accurate execution of the hardware system in simulation. Unlike CHIPSCOPE and SIGNALTAP which let you monitor a small number of signals in the design, the tool provides visibility into the whole system.
Public/Granted literature
- US20150128100A1 CYCLE-ACCURATE REPLAY AND DEBUGGING OF RUNNING FPGA SYSTEMS Public/Granted day:2015-05-07
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