Invention Grant
- Patent Title: Oxide terminated trench MOSFET with three or four masks
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Application No.: US14606900Application Date: 2015-01-27
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Publication No.: US09219003B2Publication Date: 2015-12-22
- Inventor: Sik Lui , Anup Bhalla
- Applicant: Alpha and Omega Semiconductor Incorporated
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L21/762 ; H01L29/423 ; H01L29/06 ; H01L29/08 ; H01L29/40 ; H01L29/417 ; H01L29/45

Abstract:
An oxide termination semiconductor device may comprise a plurality of gate trenches, a gate runner, and an insulator termination trench. The gate trenches are located in an active region. Each gate trench includes a conductive gate electrode. The insulator termination trench is located in a termination region that surrounds the active region. The insulator termination trench is filled with an insulator material to form an insulator termination for the semiconductor device. Source and body regions inside the active region are at source potential and source and body regions outside the isolation trench are at drain potential. The device can be made using a three-mask or four-mask process.
Public/Granted literature
- US20150137225A1 OXIDE TERMINATED TRENCH MOSFET WITH THREE OR FOUR MASKS Public/Granted day:2015-05-21
Information query
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