Invention Grant
- Patent Title: LDMOS with improved breakdown voltage
- Patent Title (中): LDMOS具有改善的击穿电压
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Application No.: US14271217Application Date: 2014-05-06
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Publication No.: US09219147B2Publication Date: 2015-12-22
- Inventor: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- Applicant: GLOBALFOUNDRIES Singapore Pte.Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE.LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE.LTD.
- Current Assignee Address: SG Singapore
- Agency: Ditthavong & Steiner, P.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/40 ; H01L29/423 ; H01L29/49 ; H01L29/51 ; H01L29/66

Abstract:
An LDMOS is formed with a field plate over the n− drift region, coplanar with the gate stack, and having a higher work function than the gate stack. Embodiments include forming a first conductivity type well, having a source, surrounded by a second conductivity type well, having a drain, in a substrate, forming first and second coplanar gate stacks on the substrate over a portion of the first well and a portion of the second well, respectively, and tuning the work functions of the first and second gate stacks to obtain a higher work function for the second gate stack. Other embodiments include forming the first gate stack of a high-k metal gate and the second gate stack of a field plate on a gate oxide layer, forming the first and second gate stacks with different gate electrode materials on a common gate oxide, and forming the gate stacks separated from each other and with different gate dielectric materials.
Public/Granted literature
- US20140239391A1 LDMOS WITH IMPROVED BREAKDOWN VOLTAGE Public/Granted day:2014-08-28
Information query
IPC分类: