CMOS integrated method for the fabrication of thermopile pixel with umbrella absorber on semiconductor substrate

Invention Grant

US09219185B2 CMOS integrated method for the fabrication of thermopile pixel with umbrella absorber on semiconductor substrate 有权

Title translation: 在半导体衬底上制造具有伞形吸收体的热电偶像素的CMOS集成方法

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Patent Title: CMOS integrated method for the fabrication of thermopile pixel with umbrella absorber on semiconductor substrate
Patent Title (中): 在半导体衬底上制造具有伞形吸收体的热电偶像素的CMOS集成方法
Application No.: US14134531

Application Date: 2013-12-19
Publication No.: US09219185B2

Publication Date: 2015-12-22
Inventor: Grigore D. Huminic , Philippe Vasseur , Hermann Karagoezoglu , Radu M. Marinescu
Applicant: Excelitas Technologies Singapore Pte. Ltd.
Applicant Address: SG Singapore
Assignee: Excelitas Technologies Singapore Pte. Ltd
Current Assignee: Excelitas Technologies Singapore Pte. Ltd
Current Assignee Address: SG Singapore
Agency: Sheehan Phinney Bass + Green PA
Agent Peter A. Nieves
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L31/18 ; G01J5/02 ; G01J5/12 ; H01L31/02

CMOS integrated method for the fabrication of thermopile pixel with umbrella absorber on semiconductor substrate

Abstract:

A method of manufacturing a pixel structure having an umbrella absorber is disclosed. The method includes providing a substrate with a membrane on a first surface of the substrate. The membrane has one or more openings that expose one or more portions of the first surface, and includes a thermopile. A sacrificial layer is deposited on the membrane and in the one or more openings. The sacrificial layer is patterned to expose a portion of the membrane associated with one or more hot junctions of the thermopile. A rigid, thermally-conductive layer is formed on the sacrificial layer and on the exposed portion of the membrane associated with the one or more hot junctions of the thermopile. An absorber is deposited on the rigid, thermally-conductive layer. A cavity is formed in the substrate from a second surface of the substrate to the membrane and the sacrificial layer is removed.

Abstract(Chinese):

公开了一种制造具有伞形吸收体的像素结构的方法。该方法包括在衬底的第一表面上提供具有膜的衬底。膜具有暴露第一表面的一个或多个部分的一个或多个开口，并且包括热电堆。牺牲层沉积在膜上和在一个或多个开口中。将牺牲层图案化以暴露与热电堆的一个或多个热连接点相关联的膜的一部分。在牺牲层上和与热电堆的一个或多个热接头相关联的膜的暴露部分上形成刚性的导热层。吸收体沉积在刚性的导热层上。在衬底中从衬底的第二表面到膜形成空腔，并去除牺牲层。

Public/Granted literature

US20150179864A1 CMOS INTEGRATED METHOD FOR THE FABRICATION OF THERMOPILE PIXEL WITH UMBRELLA ABSORBER ON SEMICONDUCTOR SUBSTRATE Public/Granted day:2015-06-25

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS