Invention Grant
US09224674B2 Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages 有权
封装的半导体芯片,具有无冲击积层(BBUL)封装的无冲击模封装接口

Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages
Abstract:
A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate.
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