Invention Grant
US09224697B1 Multi-die integrated circuits implemented using spacer dies 有权
使用间隔管芯实现多芯片集成电路

  • Patent Title: Multi-die integrated circuits implemented using spacer dies
  • Patent Title (中): 使用间隔管芯实现多芯片集成电路
  • Application No.: US14100749
    Application Date: 2013-12-09
  • Publication No.: US09224697B1
    Publication Date: 2015-12-29
  • Inventor: Woon-Seong KwonSuresh Ramalingam
  • Applicant: Xilinx, Inc.
  • Applicant Address: US CA San Jose
  • Assignee: XILINX, INC.
  • Current Assignee: XILINX, INC.
  • Current Assignee Address: US CA San Jose
  • Agent Kevin T. Cuenot
  • Main IPC: H01L21/00
  • IPC: H01L21/00 H01L23/00
Multi-die integrated circuits implemented using spacer dies
Abstract:
An integrated circuit includes an interposer die having a surface, a first die mechanically and electrically attached to the surface of the interposer die, and a second die only mechanically attached to the surface of the interposer die using a die attach adhesive.
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