Invention Grant
- Patent Title: Process for realizing a connecting structure
- Patent Title (中): 实现连接结构的过程
-
Application No.: US13219099Application Date: 2011-08-26
-
Publication No.: US09224704B2Publication Date: 2015-12-29
- Inventor: Didier Landru
- Applicant: Didier Landru
- Applicant Address: FR Bernin
- Assignee: SOITEC
- Current Assignee: SOITEC
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- Priority: FR1004050 20101014
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/30 ; H01L21/46 ; H01L23/00 ; H01L25/065 ; H01L25/00

Abstract:
The present invention relates to a process for realizing a connecting structure in a semiconductor substrate, and the semiconductor substrate realized accordingly. The semiconductor substrate has at least a first surface, and is foreseen for a 3D integration with a second substrate along the first surface, wherein the 3D integration is subject to a lateral misalignment in at least one dimension having a misalignment value. This process includes growing a diffusion barrier structure for preventing diffusion of elements out of a conductive layer into the rest of the semiconductor substrate, wherein a first end surface, being the most outward surface of the diffusion barrier structure and being substantially parallel to the first surface, along a direction perpendicular to the first surface and going from the substrate toward the first surface, of the diffusion barrier structure can have a length, in the direction of the lateral misalignment, the length being dependent on the misalignment value, wherein the length of the diffusion barrier structure is chosen such that in a 3D integrated structure a diffusion of elements out of a conductive layer of the second substrate is prevented in the integrated state.
Public/Granted literature
- US20120094469A1 PROCESS FOR REALISING A CONNECTING STRUCTURE Public/Granted day:2012-04-19
Information query
IPC分类: