Invention Grant
US09229525B2 Adaptive latency tolerance for power management of memory bus interfaces
有权
存储器总线接口电源管理的自适应延迟容限
- Patent Title: Adaptive latency tolerance for power management of memory bus interfaces
- Patent Title (中): 存储器总线接口电源管理的自适应延迟容限
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Application No.: US13919213Application Date: 2013-06-17
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Publication No.: US09229525B2Publication Date: 2016-01-05
- Inventor: Idan Reller , Rachel Menes , Arie Peled , Guy Kushtai
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F13/42
Abstract:
A method includes, in a memory system that includes a host and a storage device connected by a bus interface, assessing in the storage device a power supply state of the memory system. In the storage device a latency tolerance is selected for the bus interface based on the assessed power supply state. The selected latency tolerance is indicated from the storage device to the host, for application to the bus interface.
Public/Granted literature
- US20140372777A1 ADAPTIVE LATENCY TOLERANCE FOR POWER MANAGEMENT OF MEMORY BUS INTERFACES Public/Granted day:2014-12-18
Information query
