Invention Grant
US09229639B2 Method and non-volatile memory device for improving latency together with write protection
有权
方法和非易失性存储器件,用于与写保护一起改善延迟
- Patent Title: Method and non-volatile memory device for improving latency together with write protection
- Patent Title (中): 方法和非易失性存储器件,用于与写保护一起改善延迟
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Application No.: US13793209Application Date: 2013-03-11
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Publication No.: US09229639B2Publication Date: 2016-01-05
- Inventor: Tal Rostoker
- Applicant: SANDISK TECHNOLOGIES INC.
- Applicant Address: US TX Plano
- Assignee: SANDISK TECHNOLOGIES INC.
- Current Assignee: SANDISK TECHNOLOGIES INC.
- Current Assignee Address: US TX Plano
- Agency: Toler Law Group, PC
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G06F12/02 ; G06F12/14 ; G11C16/22 ; G11C8/20

Abstract:
A data storage device includes a write protection data structure that includes a first set of entries corresponding to a first set of ranges of memory addresses. A first indication stored in an entry, in the first set of entries, corresponds to an absence of write-protected data between a lowest address of the range of addresses corresponding to the entry and a highest address of a memory. A second indication stored in the entry corresponds to write-protected data within the range of addresses. The data storage device also includes a write protection map that includes a second set of entries corresponding to a second set of ranges of the memory addresses. The device is configured to locate, in the write protection data structure, an entry corresponding to a range of memory addresses.
Public/Granted literature
- US20140258592A1 WRITE PROTECTION DATA STRUCTURE Public/Granted day:2014-09-11
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