Apparatuses, methods and storage media associated with integrated circuits (IC) or system-on-chips (SOC) are disclosed herein. In embodiments, a multi-core IC may include a number of central processing units (CPUs), and a number of input/output (I/O) resources. The IC may further include a switch fabric configured to couple the CPUs with the I/O resources, and a register to be selectively configured to exclusively couple one of the CPUs with one of the I/O resources to form a logical domain that computationally isolates the one CPU and the one I/O resource from other CPUs and other I/O. Other embodiments may be described and claimed.