Invention Grant
- Patent Title: Semiconductor memory device and method for driving the same
- Patent Title (中): 半导体存储器件及其驱动方法
-
Application No.: US13655077Application Date: 2012-10-18
-
Publication No.: US09230615B2Publication Date: 2016-01-05
- Inventor: Yasuhiko Takemura
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2011-232374 20111024
- Main IPC: G11C7/08
- IPC: G11C7/08 ; G11C7/02 ; G11C11/4091 ; G11C11/4094

Abstract:
In a conventional DRAM, data read errors are more likely to occur along with miniaturization of DRAM A small change in the potential of a first bit line is inverted by a first inverter constituted by an n-channel transistor and a p-channel transistor, and is output to a second bit line through a first selection transistor, which is a first switch. Since the potential of the second bit line is the inverse of the potential of the first bit line, the potential difference between the first bit line and the second bit line is increased. The increased potential difference is amplified by a known sense amplifier, a flip-flop circuit composed of the first inverter and a second inverter (constituted by an n-channel transistor and a p-channel transistor), or the like.
Public/Granted literature
- US20130100748A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME Public/Granted day:2013-04-25
Information query