An electronic device includes semiconductor memory, which includes a memory cell block including first and second cell arrays and a column control block. The first cell array includes a word line, a first bit line, and a first variable resistance layer disposed between the word line and the first bit line. The second cell array includes the word line, a second bit line crossing the word line and the first bit line, and a second variable resistance layer disposed between the word line and the second bit line. The first and second variable resistance layers include different materials. The column control block supplies a first write bias for switching a resistance state of the first variable resistance layer to the first bit line and a second write bias for switching a resistance state of the second variable resistance layer to the second bit line.