Invention Grant
- Patent Title: High breakdown voltage LDMOS device
- Patent Title (中): 高击穿电压LDMOS器件
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Application No.: US13537619Application Date: 2012-06-29
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Publication No.: US09231083B2Publication Date: 2016-01-05
- Inventor: Hongning Yang , Daniel J. Blomberg , Jiang-Kai Zuo
- Applicant: Hongning Yang , Daniel J. Blomberg , Jiang-Kai Zuo
- Applicant Address: US TX Austin
- Assignee: FREESCAL SEMICONDUCTOR INC.
- Current Assignee: FREESCAL SEMICONDUCTOR INC.
- Current Assignee Address: US TX Austin
- Agency: Ingrassiz Fisher & Lorenz, P.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336 ; H01L29/66 ; H01L29/10 ; H01L29/06
Abstract:
A multi-region (81, 83) lateral-diffused-metal-oxide-semiconductor (LDMOS) device (40) has a semiconductor-on-insulator (SOI) support structure (21) on or over which are formed a substantially symmetrical, laterally internal, first LDMOS region (81) and a substantially asymmetric, laterally edge-proximate, second LDMOS region (83). A deep-trench isolation (DTI) wall (60) substantially laterally terminates the laterally edge-proximate second LDMOS region (83). Electric field enhancement and lower source-drain breakdown voltages (BVDSS) exhibited by the laterally edge-proximate second LDMOS region (83) associated with the DTI wall (60) are avoided by providing a doped SC buried layer region (86) in the SOI support structure (21) proximate the DTI wall (60), underlying a portion of the laterally edge-proximate second LDMOS region (83) and of opposite conductivity type than a drain region (31) of the laterally edge-proximate second LDMOS region (83).
Public/Granted literature
- US20140001545A1 HIGH BREAKDOWN VOLTAGE LDMOS DEVICE Public/Granted day:2014-01-02
Information query
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