A method of forming a semiconductor device comprises forming a gate over a substrate. The method also comprises forming a source and a drain on opposite sides of the gate. The source and the drain are formed such that the source and the drain are separated by a channel region beneath the gate. The source and the drain are positioned such that the channel region has a channel width with respect to a surface of the substrate greater than a width of the gate with respect to the surface of the substrate. The method further comprises forming a first silicide over a portion of the source. The method additionally comprises forming a second silicide over a portion of the drain such that the drain has an unsilicided region adjacent to the gate configured to provide a resistive region configured to sustain a voltage load in a high voltage laterally diffused metal oxide semiconductor (LDMOS) application.