- Patent Title: Analog circuits having improved transistors, and methods therefor
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Application No.: US14500236Application Date: 2014-09-29
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Publication No.: US09231541B2Publication Date: 2016-01-05
- Inventor: Lawerence T. Clark , Scott E. Thompson
- Applicant: SuVolta, Inc.
- Applicant Address: JP Kuwana, Mie
- Assignee: Mie Fujitsu Semiconductor Limited
- Current Assignee: Mie Fujitsu Semiconductor Limited
- Current Assignee Address: JP Kuwana, Mie
- Agency: Baker Botts L.L.P.
- Main IPC: H03F3/45
- IPC: H03F3/45

Abstract:
Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.
Public/Granted literature
- US20150015334A1 ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR Public/Granted day:2015-01-15
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