Invention Grant
US09231751B1 Clock-data recovery circuit and method thereof 有权
时钟数据恢复电路及其方法

Clock-data recovery circuit and method thereof
Abstract:
A clock-data recovery circuit includes a variable delay circuit that adjusts timing of a recovered clock by an amount to recover a received data stream at timing corresponding to a maximum opening of an eye pattern of the data stream. The delay timing is adjusted iteratively. The data stream in input to a 2-bit ADC, where the sampled data stream is compared with reference values representative of conditions of the eye pattern, and a result of the comparisons increases or decreases the clock delay according to a relative height of the eye pattern. A method of clock-data recovery uses the recovery circuit.
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