An image signal processor of a device, apparatus, or computing system that includes a camera capable of capturing video clips may be configured to apply non-warping and warping transformations (including image stabilization transformations) to image data received from the camera's image sensor. The transformations may be applied piecewise to pixels of the image data gathered into multiple line buffers. The line buffers may be divided into vertical slices, each of which may be processed in parallel by a respective portion of the image signal processor circuitry (or circuitry of an output rescaling unit thereof). The image signal processor may not write the received image data to system memory until after the transformations have been performed. By leveraging existing filters and scalers of the image signal processor, rather than a CPU or GPU, image stabilization may be provided that consumes half of the bandwidth and power consumed by existing techniques.